ASM5I9351

The ASM5I9351 is 9-Output Zero Delay Buffer designed by Alliance Semiconductor.

Product Overview

Alliance Semiconductor

Datasheet Details

Part number	ASM5I9351
Manufacturer	Alliance Semiconductor
File Size	560.92 KB
Description	9-Output Zero Delay Buffer
Datasheet	ASM5I9351_AllianceSemiconductor.pdf
Additional preview pages of the ASM5I9351 datasheet.

Product details

Description

The ASM5I9351 is a low voltage high performance clock directly feeds the output dividers.This mode is fully static and the minimum input clock frequency specification does not apply.200MHz PLL-based zero delay buffer designed for high speed clock distribution applications.Alliance Semiconductor 2575, Augustine Drive Santa Clara, CA Tel: 408.855.4900 Fax: 408.855.4999 www.alsc.com Notice: The information in this document is subject to change without n

Features

Output frequency range: 25 MHz to 200 MHz Input frequency range: 25 MHz to 200 MHz 2.5V or 3.3V operation ASM5I9351 The ASM5I9351 features LVPECL and LVCMOS reference clock inputs and provides 9 outputs partitioned in 4 banks of 1, 1, 2, and 5 outputs. Bank A divides the VCO output by 2 or 4 while the other banks divide by 4 or 8 per SEL(A:D) settings, see Table.2. These dividers allow output to input ratios of 4:1, 2:1, 1:1, 1:2, and 1:4. Each LVCMOS compatible output can dr.

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Other Datasheets by Alliance Semiconductor

ASM5I9350 - 3.3V 1:10 LVCMOS PLL Clock Generator
ASM5I9352 - 11-Output Zero Delay Buffer
ASM5I961C - Low Voltage Zero Delay Buffer
ASM5I961P - Low Voltage Zero Delay Buffer
ASM5I9653A - 3.3V 1:8 LVCMOS PLL Clock Generator
ASM5I9658 - 3.3V 1:10 LVCMOS PLL Clock Generator

Published: May 9, 2008 |