Description
www.DataSheet4U.com PRELIMINARY DEVICE SPECIFICATION ® HIGH PERFORMANCE SERIAL INTERFACE CIRCUITS BiCMOS PECL CLOCK SERIAL GENERATOR HIGH PERFORMANC.
S2042/S2043 S2042/S2043
FEATURES.
Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards.
Features
* Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards
* S2042 transmitter incorporates phase-locked loop (PLL) providing clock synthesis from low-speed reference
* S2043 receiver PLL configured for clock and data recovery
Applications
* High-speed data communications
* Supercomputer/Mainframe
* Workstation
* Switched networks
* Proprietary extended backplanes
* Mass storage devices/RAID drives
Figure 1. System Block Diagram
S2036 Open Fiber Control (OFC)
Fibre Channel Controller
S2042 TX