74HC107 datasheet, flip-flop equivalent, nexperia

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Features and benefits

* Wide supply voltage range from 2.0 V to 6.0 V
* CMOS low power dissipation
* High noise immunity
* Latch-up performance exceeds 100 mA per JESD 78 Class.

Description

The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of t.

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