Datasheet4U Logo Datasheet4U.com

74AUP3G34 - Low-power triple buffer

General Description

The 74AUP3G34 is a triple buffer.

Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

Key Features

  • Wide supply voltage range from 0.8 V to 3.6 V.
  • High noise immunity.
  • Low static power consumption; ICC = 0.9 μA (maximum).
  • Latch-up performance exceeds 100 mA per JESD 78B Class II.
  • Inputs accept voltages up to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial Power-down mode operation.
  • Complies with JEDEC standards:.
  • JESD8-12 (0.8 V to 1.3 V).
  • JESD8-11 (0.9 V to 1.65.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74AUP1G00 Low-power 2-input NAND gate NXP Semiconductors
74AUP1G00 SINGLE 2 INPUT POSITIVE NAND GATE Diodes
74AUP1G02 Low-power 2-input NOR gate NXP
74AUP1G02 SINGLE 2 INPUT POSITIVE NOR GATE Diodes
74AUP1G04 Low-power inverter NXP Semiconductors

Other Datasheets by Nexperia

Part Number Description
74AUP3G3404 Low-power dual buffer and single inverter
74AUP3G04 Low-power triple inverter
74AUP3G0434 Low-power dual inverter and single buffer
74AUP3G07 Low-power triple buffer
74AUP3G14 Low-power triple Schmitt trigger inverter

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74AUP3G34 Low-power triple buffer Rev. 5 — 24 June 2022 Product data sheet 1. General description The 74AUP3G34 is a triple buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down. 2. Features and benefits • Wide supply voltage range from 0.8 V to 3.6 V • High noise immunity • Low static power consumption; ICC = 0.9 μA (maximum) • Latch-up performance exceeds 100 mA per JESD 78B Class II • Inputs accept voltages up to 3.