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74AUP1T58 Datasheet Low-power configurable gate

Manufacturer: Nexperia

Datasheet Details

Part number 74AUP1T58
Manufacturer Nexperia
File Size 262.72 KB
Description Low-power configurable gate
Datasheet download datasheet 74AUP1T58 Datasheet

General Description

The 74AUP1T58 is a configurable multiple function gate with level translating, Schmitt-trigger inputs.

The device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer;

using the 3-bit input.

Overview

74AUP1T58 Low-power configurable gate with voltage-level translator Rev.

7 — 26 January 2022 Product data sheet 1.

Key Features

  • Wide supply voltage range from 2.3 V to 3.6 V.
  • High noise immunity.
  • Low static power consumption; ICC = 1.5 μA (maximum).
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Overvoltage tolerant inputs to 3.6 V.
  • Low noise overshoot and undershoot < 10 % of VCC.
  • IOFF circuitry provides partial power-down mode operation.
  • ESD protection:.
  • HBM JESD22-A114F Class 3A exceeds 5000 V.
  • MM JESD22-A115-.