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74AHC138D Datasheet 3-to-8 Line Decoder/demultiplexer

Manufacturer: Nexperia

Overview: 74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 5 — 10 September 2020 Product data sheet 1.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The 74AHC138;

74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

Key Features

  • Balanced propagation delays.
  • All inputs have Schmitt-trigger action.
  • Demultiplexing capability.
  • Multiple input enable for easy expansion.
  • Ideal for memory chip select decoding.
  • Inputs accepts voltages higher than VCC.
  • For 74AHC138 only: operates with CMOS input levels.
  • For 74AHCT138 only: operates with TTL input levels.
  • ESD protection:.
  • HBM JESD22-A114E exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200.

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