TMS417800 Datasheet | Texas Instruments

description The TMS41x800 series is a set of high-speed, 16 777 216-bit dynamic random-access memories (DRAMs) organized as 2 097 152 words of eight bits each. It employs TI’s state-of-the-art EPIC technology for high performance, reliability, and low power. These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines are latched on-chip to simplify system design. Data out is unlatched to allow greater system flexibility. The TMS416800 and TMS417800 are offered in a 28-lead plastic surface-mount SOJ package (DZ suffix). This package is characterized for operation from 0°C to 70°C. SMKS883A - OCTOBER 1995 - REVISED MARCH 1996 DZ PACKAGE ( TOP VIEW ) VCC DQ0 DQ1 DQ2 DQ3 W RAS A11† A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 VSS 27 DQ7 26 DQ6 25 DQ5 24 DQ4 23 CAS 22 OE 21 A9 20 A8 19 A7 18 A6 17 A5 16 A4 15 VSS PIN NOMENCLATURE A0 - A11† CAS DQ0 - DQ7 OE RAS VCC VSS W Address Inputs Column-Address Strobe Data In / Data Out Output Enable Row-Address Strobe 5V Ground Write Enable † A11 is NC (no internal connection) for TMS417800. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and TI are trademarks of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1996, Texas Instruments Incorporated - POST OFFICE BOX 1443 HOUSTON, TEXAS 77251- 1443 TMS416800, TMS417800 2097152-WORD BY 8-BIT HIGH-SPEED DRAMS SMKS883A - OCTOBER 1995 - REVISED MARCH 1996 operation enhanced page mode Enhanced page-mode operation allows faster memory access by keeping the same row address while selecting random column addresses. The...