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SN74SSQE32882 Datasheet, Texas Instruments

SN74SSQE32882 buffer equivalent, 28-bit to 56-bit registered buffer.

SN74SSQE32882 Avg. rating / M : 1.0 rating-13

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SN74SSQE32882 Datasheet

Features and benefits

1
*2 JEDEC SSTE32882 Compliant
* 1-to-2 Register Outputs and 1-to-4 Clock Pair Outputs Support Stacked DDR3 DIMMs
* Chip Select Inputs Prevent Data Outputs fr.

Application


* DDR3 Registered DIMMs up to DDR3-1333
* Single-, Dual- and Quad-Rank RDIMM DESCRIPTION/ORDERING INFORMATION Th.

Description

ORDERING INFORMATION This JEDEC SSTE32882-compliant, 28-bit 1:2 or 26-bit 1:2 and 4-bit 1:1 registering clock driver with parity is designed for operation on DDR3 Registered DIMMs up to DDR3-1333 with VDD of 1.5 V. All inputs are 1.5-V, CMOS-compatib.

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TAGS

SN74SSQE32882
28-BIT
56-BIT
REGISTERED
BUFFER
SN74SSQEA32882
SN74SSQEB32882
SN74SSQEC32882
Texas Instruments

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