SN74LVC2G80 flip-flop equivalent, dual positive-edge-triggered d-type flip-flop.
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*2 Available in the Texas Instruments NanoFree™ Package
* Supports 5-V VCC Operation
* Inputs Accept Voltages to 5.5 V
* Max tpd of 4.2 ns at 3.3 V
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using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is .
This dual positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse..
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