Datasheet4U Logo Datasheet4U.com

SN74LVC1G02 - Single 2-Input Positive NOR-Gate

Datasheet Summary

Description

This single 2-input positive-NOR gate is designed for 1.65-V to 5.5-V VCC operation.

B in positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

Features

  • 1 Available in the Ultra-Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch.
  • Supports 5-V VCC Operation.
  • Inputs Accept Voltages to 5.5 V.
  • Provides Down Translation to VCC.
  • Max tpd of 3.6 ns at 3.3 V.
  • Low Power Consumption, 10-μA Max ICC.
  • ±24-mA Output Drive at 3.3 V.
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection.
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD P.

📥 Download Datasheet

Datasheet preview – SN74LVC1G02

Datasheet Details

Part number SN74LVC1G02
Manufacturer Texas Instruments
File Size 2.44 MB
Description Single 2-Input Positive NOR-Gate
Datasheet download datasheet SN74LVC1G02 Datasheet
Additional preview pages of the SN74LVC1G02 datasheet.

📁 Similar Datasheet

  • SN74LVC1G125 - high performance non-inverting buffer (UMW)
  • SN74LVC1G34 - Single buffer (UMW)
  • SN74L71 - AND-Gate R-S Master-Slave F-F (National Semiconductor)
  • SN74L74N - Dual D-Type Flip-Flop (ETC)
  • SN74LS00 - QUAD 2-INPUT NAND GATE (Motorola)
  • SN74LS00 - Quad 2-Input NAND Gate (ON Semiconductor)
  • SN74LS02 - QUAD 2-INPUT NOR GATE (Motorola)
  • SN74LS02 - QUAD 2-INPUT NOR GATE (ON Semiconductor)
  • SN74LS04 - Hex Inverter (ON Semiconductor)
  • SN74LS04 - HEX INVERTER (Motorola)
Other Datasheets by Texas Instruments

Full PDF Text Transcription

Click to expand full text
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74LVC1G02 SCES213X – APRIL 1999 – REVISED APRIL 2014 SN74LVC1G02 Single 2-Input Positive NOR-Gate 1 Features •1 Available in the Ultra-Small 0.64 mm2 Package (DPW) with 0.5-mm Pitch • Supports 5-V VCC Operation • Inputs Accept Voltages to 5.5 V • Provides Down Translation to VCC • Max tpd of 3.6 ns at 3.3 V • Low Power Consumption, 10-μA Max ICC • ±24-mA Output Drive at 3.
Published: |