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SN74AUP1G57 - Low-Power Configurable Multiple-Function Gate

General Description

The SN74AUP1G57 device

Key Features

  • Available in the Texas Instruments NanoStar™ Packages.
  • Low Static-Power Consumption (ICC = 0.9 μA Maximum).
  • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typical at 3.3 V).
  • Low Input Capacitance (Ci = 1.5 pF Typical).
  • Low Noise.
  • Overshoot and Undershoot.

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Other Datasheets by Texas Instruments

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SN74AUP1G58 LOW-POWER CONFIGURABLE MULTIPLE-FUNCTION GATE
SN74AUP1G00 Low-Power Single 2-Input Positive-NAND Gate
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN74AUP1G57 SCES503J – NOVEMBER 2003 – REVISED JUNE 2015 SN74AUP1G57 Low-Power Configurable Multiple-Function Gate 1 Features • Available in the Texas Instruments NanoStar™ Packages • Low Static-Power Consumption (ICC = 0.9 μA Maximum) • Low Dynamic-Power Consumption (Cpd = 4.3 pF Typical at 3.3 V) • Low Input Capacitance (Ci = 1.5 pF Typical) • Low Noise – Overshoot and Undershoot <10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Includes Schmitt-Trigger Inputs • Wide Operating VCC Range of 0.8 V to 3.6 V • Optimized for 3.3-V Operation • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • tpd = 5.3 ns Maximum at 3.