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SN74AUC1G126 - Single Bus Buffer Gate

General Description

The SN74AUC1G126 bus buffer gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G126 device is a single line driver with a tri-state output.

The output is disabled when the output-enable (OE) input is low.

Key Features

  • 1 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
  • ESD Protection Exceeds JESD22.
  • 2000-V Human-Body Model (A114-A).
  • 200-V Machine Model (A115-A).
  • 1000-V Charged-Device Model (C101).
  • Available in TI's NanoFree™ Package.
  • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
  • Ioff Supports Partial Power Down Mode and Back Drive Protection.
  • Sub-1 V Operable.
  • Ma.

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Other Datasheets by Texas Instruments

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SN74AUC1G125 Single Bus Buffer Gate
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Order Now Technical Documents Tools & Software Support & Community SN74AUC1G126 SCES383L – MARCH 2002 – REVISED JANUARY 2018 SN74AUC1G126 Single Bus Buffer Gate With Tri-state Output 1 Features •1 Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Protection Exceeds JESD22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) • Available in TI's NanoFree™ Package • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • Ioff Supports Partial Power Down Mode and Back Drive Protection • Sub-1 V Operable • Maximum tpd of 2.5 ns at 1.8 V • Low Power Consumption, 10-µA Maximum ICC • ±8-mA Output Drive at 1.