SN74AUC125 gate equivalent, quadruple bus buffer gate.
* Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
* Ioff Supports Partial-Power-Down Mode Operation
* Sub-1-V O.
using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is .
ORDERING INFORMATION
This quadruple bus buffer gate is designed for 0.8-V to 2.7-V VCC operation, but is designed specifically for 1.6-V to 1.95-V VCC operation.
The SN74AUC125 contains four independent line drivers with 3-state outputs. Each output .
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