Datasheet4U Logo Datasheet4U.com

SN74ACT74-EP - DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

Description

The SN74ACT74-EP is a dual positive-edge-triggered D-type flip-flop.

A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs.

📥 Download Datasheet

📁 Similar Datasheet

  • SN74101 - AND-OR Gate (ETC)
  • SN74102 - AND Gate (ETC)
  • SN74103 - Dual J-K Flip-Flop (ETC)
  • SN74106 - Dual J-K Flip-Flop (ETC)
  • SN74108 - Dual J-K Flip Flop (ETC)
  • SN7411 - Triple 3-Input AND (ETC)
  • SN74120 - Dual Pulse Synchronizers / Drivers (Texas Instruments Inc)
  • SN74124 - Dual Voltage Controlled Oscillators (ETC)
  • SN7415 - Triple 3 Input AND Gate (Motorola)
  • SN74381 - integrated circuits (ETC)
Other Datasheets by Texas Instruments
  • SN74ACT74 - DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
  • SN74ACT7803 - 512 x 18 CLOCKED FIRST-IN FIRST-OUT MEMORY
  • SN74ACT7806 - 256 x 18 STROBED FIRST-IN FIRST-OUT MEMORY
  • SN74ACT7813 - 64 x 18 CLOCKED FIRST-IN FIRST-OUT MEMORY
  • SN74ACT7814 - 64 x 18 STROBED FIRST-IN FIRST-OUT MEMORY
  • SN74ACT00 - Quadruple 2-Input Positive-NAND Gates
  • SN74ACT00-Q1 - QUADRUPLE 2-INPUT POSITIVE-NAND GATES
  • SN74ACT04 - Hex Inverters

Full PDF Text Transcription

Click to expand full text
SN74ACT74ĆEP DUAL POSITIVEĆEDGEĆTRIGGERED DĆTYPE FLIPĆFLOP WITH CLEAR AND PRESET SCAS722 − OCTOBER 2003 D Controlled Baseline − One Assembly/Test Site, One Fabrication Site D Extended Temperature Performance of −55°C to 125°C D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life.
Published: |