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HC165QQ1 - 8-Bit Parallel-Load Shift Registers

Download the HC165QQ1 datasheet PDF (HC165Q1 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for 8-bit parallel-load shift registers.

Description

The SN74HC165 is an 8-bit parallel-load shift register that, when clocked, shift the data toward a serial (QH) output.

H) inputs that are enabled by a low level at the shift/load (SH/LD) inp

Features

  • a clock-inhibit (CLK INH) function and a complementary serial (QH) output. Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH should be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel input.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HC165Q1-etcTI.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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SN74HC165ĆQ1 8ĆBIT PARALLELĆLOAD SHIFT REGISTER D Qualified for Automotive Applications D ESD Protection Exceeds 1500 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 13 ns D ±4-mA Output Drive at 5 V D Low Input Current of 1 µA Max D Complementary Outputs D Direct Overriding Load (Data) Inputs D Gated Clock Inputs D Parallel-to-Serial Data Conversion SCLS518A − AUGUST 2003 − REVISED APRIL 2008 D OR PW PACKAGE (TOP VIEW) SH/LD 1 CLK 2 E3 F4 G5 H6 QH 7 GND 8 16 VCC 15 CLK INH 14 D 13 C 12 B 11 A 10 SER 9 QH description/ordering information The SN74HC165 is an 8-bit parallel-load shift register that, when clock
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