CD54HC238 Overview
Description
CD74HCT138E -55 to 125 16 Ld PDIP The ’HC138, ’HC238, ’HCT138, and ’HCT238 are high-speed silicon-gate CMOS decoders well suited to memory address decoding or data-rout.
Key Features
- Select One Of Eight Data Outputs Active Low for 138, Active High for 238
- l/O Port or Memory Selector
- Three Enable Inputs to Simplify Cascading
- Typical CL = 15 Propagation Delay pF, TA = 25oC of 13 ns at VCC = 5 V
- Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . -55oC to 125oC
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
