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ADS41B25 - Ultralow-Power ADC

Description

The ADS41B25 is a member of the ultralow-power ADS4xxx analog-to-digital converter (ADC) family, featuring integrated analog input buffers.

This device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power.

Features

  • 1.
  • 23 Resolution: 12-Bit, 125MSPS.
  • Integrated High-Impedance Analog Input Buffer:.
  • Input Capacitance at dc: 3.5pF.
  • Input Resistance at dc: 10kΩ.
  • Maximum Sample Rate: 125MSPS.
  • Ultralow Power:.
  • 1.8V Analog Power: 114mW.
  • 3.3V Buffer Power: 96mW.
  • I/O Power: 100mW (DDR LVDS).
  • High Dynamic Performance:.
  • SNR: 68.3dBFS at 170MHz.
  • SFDR: 87dBc at 170MHz.
  • Output Interface:.
  • Double Da.

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Full PDF Text Transcription

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ADS41B25 www.ti.com 12-Bit, 125MSPS, Ultralow-Power ADC with Analog Buffer Check for Samples: ADS41B25 SBAS548 – JUNE 2011 FEATURES 1 •23 Resolution: 12-Bit, 125MSPS • Integrated High-Impedance Analog Input Buffer: – Input Capacitance at dc: 3.5pF – Input Resistance at dc: 10kΩ • Maximum Sample Rate: 125MSPS • Ultralow Power: – 1.8V Analog Power: 114mW – 3.3V Buffer Power: 96mW – I/O Power: 100mW (DDR LVDS) • High Dynamic Performance: – SNR: 68.3dBFS at 170MHz – SFDR: 87dBc at 170MHz • Output Interface: – Double Data Rate (DDR) LVDS with Programmable Swing and Strength: – Standard Swing: 350mV – Low Swing: 200mV – Default Strength: 100Ω Termination – 2x Strength: 50Ω Termination – 1.
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