74HC112 flip-flops equivalent, dual j-k negative-edge-triggered flip-flops.
* Wide operating voltage range of 2 V to 6 V
* Outputs can drive up to 10 LSTTL loads
* Low power consumption, 40-μA max ICC
* Typical tpd = 13 ns
* ±.
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN54HC112, SN74HC112
SCLS099H
&nbs.
The ’HC112 devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), .
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