WED3EG7218S-JD3 datasheet, unbuffered equivalent, White Electronic Designs

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datasheet Download (Size : 237.03KB)

Features and benefits

Double-data-rate architecture DDR200, DDR266, DDR333 and DDR400
* JEDEC design speciﬁed BI-directional data strobes (DQS) Differential clock inputs (CK & CK#) Program.

Application

JEDEC 184 pin DIMM package
* JD3 PCB height: 30.48 (1.20") Max NOTE: Consult factory for availability of:
* Ro.

Description

The WED3EG7218S is a 16Mx72 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component. The module consists of nine 16Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle cont.

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