WCSS0418V1F Datasheet, Weida Semiconductor

* Supports 117-MHz microprocessor cache systems with zero wait states
* 256K by 18 common I/O
* Fast clock-to-output times — 7.5 ns (117-MHz version)
* Tw.

The WCSS0418V1F is a 3.3V, 256K by 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first ad.