VT73LVP10S1 Datasheet TTL to Differential LVPECL Translator

Manufacturer: Vaishali Semiconductor

VT73LVP10S1 ttl to differential lvpecl translator by Vaishali Semiconductor - Datasheet Preview

Datasheet Details

Part number	VT73LVP10S1
Manufacturer	Vaishali Semiconductor
File Size	69.93 KB
Description	TTL to Differential LVPECL Translator
Datasheet	VT73LVP10S1 Datasheet

General Description

The Vaishali VT73LVP10 is a general purpose TTL (CMOS) to differential LVPECL translator, with active-LOW enable.

The device operates from a single 3.3V supply.

When /EN is LOW or open circuit, the device accepts an LVTTL or LVCMOS input and provides differential LVPECL outputs referenced to the positive supply rail.

Overview

Preliminary VT73LVP10 TTL to Differential LVPECL Translator with Enable Applications •= PECL clock source.

Key Features

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= 700ps typical propagation delay Differential LVPECL outputs Flow-through pinout -40 C to +85 C operating temperature range o o.
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= 5V - tolerant inputs ESD rating >2000V (Human Body Model) or >200V (Machine Model) Available as die, 8-pin SOIC or 8 pin MSOP package Figure 1. Functional Block Diagram & Pin Assignment 8 pin SOIC/ MSOP NC 1 8 VDD Q 2 LVPECL QN 3 TTL/ CMOS 7 D 6 NC /EN 4 100kΩ 5 GND 2002-01-15 Vaish.

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