TH50VSF3582AASB Overview
The TH50VSF3582/3583AASB is a mixed multi-chip package containing a 8,388,608-bit Full CMOS SRAM and a 33,554,432-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration. FLASH MEMORY a Simultaneous Read/Write operation so that data can be read during a Write or Erase operation.
TH50VSF3582AASB Key Features
- Data retention supply voltage VCCs = 1.5 V~3.3 V
- Current consumption Operating: 45 mA maximum (CMOS level) Standby: 10 µA maximum (SRAM CMOS level) Standby: 10 µA maximu
- Block erase architecture for flash memory 8 × 8 Kbytes 63 × 64 Kbytes
- Organization
- PIN ASSIGNMENT (TOP VIEW)
- Case: CIOF = VCC, CIOS = VCC (×16, ×16)
- TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devic