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Sony Semiconductor Electronic Components Datasheet

CXB1456R Datasheet

VGA/SVGA/XGA 24-bit Receiver

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VGA/SVGA/XGA 24-bit Receiver
CXB1456R
Description
CXB1456R is the 1 chip deserializer for VGA/SVGA/
XGA 24-bit color digital RGB, and meet to the Gigabit
Video Interface specification.
Features
• 1 chip receiver for serial transmission of 24-bit color
VGA/SVGA/XGA picture
• On chip PLL circuit for data and clock recovery
• On chip panel mode automatically selectable circuit
• TTL compatible I/O
• Support 1 pixel/shiftclock mode with 1 chip and 2
pixel/shiftclock mode with 2 chip
• +3.3V single power supply
• Low power consumption
• 64pin plastic LQFP package with body size 10mm
× 10mm
Application
Gigabit video interface
Structure
Bi-CMOS IC
Block Digagram & Pin out
64 pin LQFP (Plastic)
Absolute Maximum Ratings
• Supply voltage
Vcc
• Storage temperature Tstg
• Allowable power dissipation
PD
4.2 V
–65 to +150 °C
650 mW
Recommended Operating Condition
• Supply voltage
3.3 ± 0.3
• Operating temperature Topr 0 to +80
V
°C
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
CNTL 49
DE 50
SFTCLK 51
GND 52
VDD 53
VEE 54
VCC 55
HSYNC 56
VSYNC 57
B7 58
B6 59
GND 60
VDD 61
B5 62
B4 63
VDD 64
CDR
PLL
Serial
to
Parallel
Converter
Decoder
32 CLKPOL
31 R0
30 R1
29 GND
28 VDD
27 VEE
26 VCC
25 R2
24 R3
23 R4
22 R5
21 GND
20 VDD
19 R6
18 R7
17 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Fig. 1. Block Diagram & Pin out
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E98Y04C9X-PS


Sony Semiconductor Electronic Components Datasheet

CXB1456R Datasheet

VGA/SVGA/XGA 24-bit Receiver

No Preview Available !

CXB1456R
Pin List
Table 1. Power/Ground
Pin name
Pin number
VDD
GND
VCC
VEE
VCCA
VEEA
VEES
8, 16, 20, 28, 53, 61, 64
1, 9, 17, 21, 29, 52, 60
26, 55
27, 54
44
45
46
Descriptions
MOS power supply, should be connected to 3.3V ± 0.3V
MOS ground, connected to 0V
ECL power supply, connected to 3.3V ± 0.3V
ECL ground, connected to 0V
Analog power supply, connected to 3.3V ± 0.3V
Analog ground, connected to 0V
Substrate GND, connected to 0V
Table 2. Digital Signals
Pin name
Pin
number
Type
Descriptions
SFTCLK
51
Shift clock, for the
TTL out data fetch at falling or
rising edge
RED (7 to 0)
GRN (7 to 0)
BLU (7 to 0)
18, 19,
22, 23,
24, 25,
30, 31
6, 7, 10,
11, 12,
TTL out
13, 14, 15
58, 59,
62, 63,
2, 3, 4, 5
Pixel data
HSYNC 56 TTL out Hsync data
VSYNC 57 TTL out Vsync data
CNTL
49 TTL out Control data
DE 50 TTL out Display enable data
LOS
36 TTL out Los of signal
PANEL (1, 0) 35, 34
TTL in
Panel mode select
switch
CLKPOL
32
TTL in
Trigger edge select
switch
CE 38 TTL in Chip enable
TESTEXN
TESTDT
43,
37
TTL in
Reversed for TEST
under fabrication
VCCA
TTL-IN
VEES
Equivalent circuit
VDD
TTL-OUT
GND
VDD
GND
–2–


Part Number CXB1456R
Description VGA/SVGA/XGA 24-bit Receiver
Maker Sony Corporation
Total Page 17 Pages
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