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HYB39S16400AT-10 - 16 MBit Synchronous DRAM

Download the HYB39S16400AT-10 datasheet PDF. This datasheet also covers the HYB39S16160AT-10 variant, as both devices belong to the same 16 mbit synchronous dram family and are provided as variant models within a single manufacturer datasheet.

Description

VDD DQ0 VSSQ DQ1 VDDQ DQ2 VSSQ DQ3 VDDQ N.C.

N.C.

Features

  • e Register For.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HYB39S16160AT-10_SiemensSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
HYB39S128160CT 128-MBit Synchronous DRAM Infineon Technologies
HYB39S128160CTL 128-MBit Synchronous DRAM Infineon Technologies
HYB39S128160FE 128-MBit Synchronous DRAM Qimonda
HYB39S128160FEL 128-MBit Synchronous DRAM Qimonda
HYB39S128160FT 128-MBit Synchronous DRAM Qimonda

Other Datasheets by Siemens Semiconductor Group (now Infineon)

Part Number Description
HYB39S16400AT-8 16 MBit Synchronous DRAM
HYB39S16160AT-10 16 MBit Synchronous DRAM
HYB39S16160AT-8 16 MBit Synchronous DRAM
HYB39S16160CT-10 16 MBit Synchronous DRAM
HYB39S16160CT-6 1M x 16 MBit Synchronous DRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com 16 MBit Synchronous DRAM (second generation) Advanced Information • High Performance: CAS latency = 3 -8 125 8 7 -10 100 10 8 Units MHz ns ns HYB 39S16400/800/160AT-8/-10 • Multiple Burst Read with Single Write Operation • Automatic and Controlled Precharge Command • Data Mask for Read/Write control (× 4, × 8) • Dual Data Mask for byte control (× 16) • Auto Refresh (CBR) and Self Refresh • Suspend Mode and Power Down Mode • 4096 refresh cycles/64 ms • Random Column Address every CLK (1-N Rule) • Single 3.3 V ± 0.
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