Download the K7P321888M datasheet PDF.
This datasheet also covers the K7P323688M variant, as both devices belong to the same 1mx36 & 2mx18 sram family and are provided as variant models within a single manufacturer datasheet.
Description
Pin Name K, K SAn DQn SS SW SWa SWb SWc SWd M 1 , M2 G Pin Description Differential Clocks Synchronous Address Input Bi-directional Data Bus Synchronous Select Synchronous Global Write Enable Synchronous Byte a Write Enable Synchronous Byte b Write Enable Synchronous Byte c Write Enable Synchronous
Features
- 1Mx36 or 2Mx18 Organizations.
- 1.8V VDD/1.5V or 1.8V VDDQ.
- HSTL Input and Output Levels.
- Differential, HSTL Clock Inputs K, K.
- Synchronous Read and Write Operation.
- Registered Input and Registered Output.
- Internal Pipeline Latches to Support Late Write.
- Byte Write Capability(four byte write selects, one for each 9bits).
- Synchronous or Asynchronous Output Enable.
- Power Down Mode via ZZ Signal.
K7P321888M Datasheet
