Download the K4D261638K-LC50 datasheet PDF.
This datasheet also covers the K4D261638K variant, as both devices belong to the same 128mbit gddr sdram family and are provided as variant models within a single manufacturer datasheet.
Description
The K4D261638K is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology.
Features
- 2.5V + 5% power supply for device operation.
- 2.5V + 5% power supply for I/O interface.
- SSTL_2 compatible inputs/outputs.
- 4 banks operation.
- MRS cycle with address key programs
-. Read latency 2,3(clock) -. Burst length (2, 4 and 8) -. Burst type (sequential & interleave).
- All inputs except data & DM are sampled at the positive going edge of the system clock.
- Differential clock input.
- Wrtie-Interrupted by Read Function.