SUMMARY MULTI-CHIP PACKAGE
  – 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Flash Memory
  – 1 die of 32 Mbit (2Mb x16) Asyn.

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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