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74VHC126 - QUAD BUS BUFFERS

Download the 74VHC126 datasheet PDF. This datasheet also covers the 74VHC variant, as both devices belong to the same quad bus buffers family and are provided as variant models within a single manufacturer datasheet.

Description

The 74VHC126 is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.

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Note: The manufacturer provides a single datasheet file (74VHC-126.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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( DataSheet : www.DataSheet4U.com ) ® 74VHC126 QUAD BUS BUFFERS (3-STATE) PRELIMINARY DATA s s s s s s s s s s HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 126 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.) M (Micro Package) T (TSSOP Package) ORDER CODES : 74VHC126M 74VHC126T This device requires the 3-STATE control input G to be set low to place the output into the high impedance state.
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