R6500/11-/12-/15
'1'Rockwell
R6500/11 , R6500/12 and R6500/15
One-Chip Microcomputers
SECTION 1
INTRODUCTION
1.1 FEATURES
• Enhanced 6502 CPU
-Four new bit manipulation instructions:
Set Memory Bit (SMB)
Reset Memory Bit (RMB)
Branch on Bit Set (BBS)
Branch on Bit Reset (BBR)
-Decimal and binary arithmetic modes
-13 addressing modes
-True indexing
• 3K-byte mask-programmable ROM (R6500/11, R6500/12)
• 4K-byte mask-programmable ROM (R6500/15)
• 192-byte static RAM
• 32 TIL-compatible 110 lines (R6500/11, R6500/15)
• 56 TIL-compatible 110 lines (R6500/12)
• One 8-bit port may be tri-stated under software control
• One 8-bit port with programmable latched input
• Two 16-bit programmable counter/timers, with latches
-Pulse width measurement
-Asymmetrical pulse generation
-Pulse generation
-Interval timer
-Event counter
-Retriggerable interval timer
• Serial port
-Full-duplex asynchronous operation mode
-Selectable 5- to 8-bit characters
-Wake-up feature
-Synchronous shift register mode
-Standard programmable bit rates, programmable up to
62.5K bits/sec @ 1 MHz
• Ten interrupts
-Four edge-sensitive lines; two positive, two negative
-Reset
-Non-maskable
-Two counter underflows
-Serial data received
-Serial data transmitted
• Bus expandable to 16K bytes of extemal memory
• Flexible clock circuitry
-2-MHz or I-MHz internal operation
- Internal clock with external 2 MHz to 4 MHz series
resonant XTAL at two or four times internal frequency
- External clock input divided by one, two or four
• 1 pS minimum instruction execution time @ 2 MHz
• NMOS-3 silicon gate, depletion load technology
• Single + 5V power supply
• 12 mW stand-by power for 32 bytes of the 192-byte RAM
• 40-pin DIP (R6500/11 and R6500/15)
• 44-pin PLCC (R6500/11 and R6500/15)
• 64-pin QUIP (R6500/12)
1.2 SUMMARY
These Rockwell microcomputers are complete, high-
performance 8-bit NMOS-3 microcomputers on a single chip,
and are compatible with all members of the R6500 family.
The R6500/11 consists of an enhanced 6502 CPU, an internal
clock oscillator, 3072 bytes of Read-Only Memory, 192 bytess
of Random Access Memory (RAM) and versatile interface cir-
cuitry (Figure 1-1). The interface circuitry includes two 16-bit
programmable timer/counters, 32 bidirectional input/output lines
(including four edge-sensitive lines and input latching on one
8-bit port), a full-duplex serial 110 channel, ten interrupts and
bus expandability.
The R6500/15 is identical to the R6500111 except it has 4K of
ROM.
The innovative architecture and the demonstrated high per-
formance of the R6502 CPU, as well as instruction simplicity,
results in system cost-effectiveness and a wide range of com-
putational power. These features make either device a leading
candidate for microcomputer applications.
The R6500/12 consists of all the features of the R6500/11 plus
three additional 110 ports. It is packaged in a 64 pin QUIP.
To allow prototype circuit development, Rockwell offers a PROM-
compatible 64-pin extended microprocessor device. This device,
the R6511Q, provides all R6500/11 or R6500/15 interface lines,
plus the address bus, data bus and control lines to interface with
external memory. With the addition of external circuits it can also
be used to emulate the R6500/12 (contact Rockwell sales offices
listed on the back page for details).
Document No. 29651N23
Product Description
3-63
Order No. 2119
Rev. 7, June 1987
