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RNA52A10MM - Dual CMOS system-RESET

General Description

The RNA52A10MM incorporates two reset circuits, one with and one without a delay function, allowing the generation of separate reset signals for a microprocessor and associated system circuits.

Key Features

  • Two CMOS reset circuits, one with and one without the delay function.
  • Reference voltage: 1.0 V.
  • Reference voltage accuracy: ± 50 mV.
  • Reference voltage hysteresis: 6% (typ. ).
  • Low current consumption: 1.1 μA (typ. ).
  • Delay time set by an external CR circuit.
  • Manual reset input.
  • Open-drain output.
  • MMPAK-8 (8-pin) package.
  • Operating temperature range:.
  • 40 to 85°C.
  • Ordering Information Part Na.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet RNA52A10MM Dual CMOS system–RESET IC R03DS0091EJ0600 (Previous code: REJ03D0858-0500) Rev.6.00 Dec 19, 2014 Description The RNA52A10MM incorporates two reset circuits, one with and one without a delay function, allowing the generation of separate reset signals for a microprocessor and associated system circuits. The detection voltage of each reset circuit is determined by the value of an external resistor, and the internal reference voltage is 1.0 V. The CMOS process for the RNA52A10MM means that the device draws only 1.1 μA (typ.). The reset cancellation delay time is set with a high degree of accuracy by the values of a capacitor and resistor connected with the CD pin.