HD74LV2GT123A Datasheet | Renesas

Description The HD74LV2GT123A features output pulse duration control by three methods. In the first method, the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low. In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high. The basic pulse duration is programmed by selecting external resistance and capacitance values. The external timing capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between Rext/Cext and VCC. To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and VCC. Once triggered, the basic pulse duration can be extended by retriggering the gated low level active (A) or high level active (B) input. Pulse duration can be reduced by taking CLR low. The output pulse equation is simply : t WQ = Cext - Rext. Low voltage and high speed operation is suitable for the battery powered products (e.g., notebook puters), and the low power consumption extends the battery life. Features - The basic gate function is lined up as Renesas uni logic series. - Supplied on emboss taping for high speed automatic mounting. - Control input is TTL patible input level. Supply voltage range : 4.5 to 5.5 V Operating temperature range : - 40 to +85°C - All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) - Output current ±12 m A (@VCC = 4.5 V to 5.5 V) - All the logical inputs have hysteresis voltage for the slow transition. - Ordering Information Part Name HD74LV2GT123AUSE Package Type SSOP-8 pin Package Code TTP-8DBV Package Taping Abbreviation Abbreviation (Quantity) US E (3,000 pcs / Reel) Rev.2.00, Apr.18.2003, page 1 of 14 .. Outline and Article Indication - HD74LV2GT123A Index band Lot No. Y M W T 2 3 SSOP- 8 Marking Y : Year code (the last digit of year) M : Month code W : Week code Function Table Inputs CLR L H H H H ↑ H : High...