RL78I1D Datasheet, Renesas

Ultra-low power consumption technology
* VDD = 1.6 V to 3.6 V
* HALT mode
* STOP mode
* SNOOZE mode RL78 CPU core
* CISC architecture with 3-stage pip.

Power management and reset function
* On-chip power-on-reset (POR) circuit
* On-chip voltage detector (LVD) (Se.