RL78G13 Overview
Key Features
- 1.6 V to 5.5 V operation from a single supply
- Stop (RAM retained): 0.23 µA, (LVD enabled): 0.31 µA
- Halt (RTC + LVD): 0.57 µA
- Snooze: 0.70 mA (UART), 1.20 mA (ADC)
- Operating: 66 µA/MHz 16-bit RL78 CPU Core
- Delivers 41 DMIPS at maximum operating frequency of 32 MHz
- Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles
- CISC Architecture (Harvard) with 3-stage pipeline
- Multiply Signed & Unsigned: 16 x 16 to 32-bit result in 1 clock cycle
- MAC: 16 x 16 to 32-bit result in 2 clock cycles
