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ICS95V842 - Clock Driver

Features

  • Low skew, low jitter PLL clock driver.
  • Feedback pins for input to output synchronization.
  • Spread Spectrum tolerant inputs.
  • With bypass mode mux.
  • Operating frequency 60 to 220 MHz Switching Characteristics:.
  • CYCLE - CYCLE jitter:.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ICS95V842 DDR Phase Lock Loop Clock Driver (60MHz - 220MHz) Recommended Application: 1:2 DDRI Clock Driver Product Description/Features: • Low skew, low jitter PLL clock driver • Feedback pins for input to output synchronization • Spread Spectrum tolerant inputs • With bypass mode mux • Operating frequency 60 to 220 MHz Switching Characteristics: • CYCLE - CYCLE jitter: <75ps • OUTPUT - OUTPUT skew: <60ps • Period jitter: ±75ps • Half-Period jitter: ±75ps Pin Configuration VDD2.5 1 DDRT0 2 DDRC0 3 GND 4 CLK_INT 5 CLK_INC 6 AVDD 7 AGND 8 ICS95V842 16 GND 15 DDRC1 14 DDRT1 13 VDD2.
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