ICS95V842 Overview
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ICS95V842 Key Features
- Low skew, low jitter PLL clock driver
- Feedback pins for input to output synchronization
- Spread Spectrum tolerant inputs
- With bypass mode mux
- Operating frequency 60 to 220 MHz
- CYCLE jitter: <75ps
- OUTPUT
- OUTPUT skew: <60ps
- Period jitter: ±75ps
- Half-Period jitter: ±75ps