ICS650-01 datasheet, source equivalent, Renesas

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Features and benefits

* Packaged in 20-pin SSOP (QSOP)
* Pb (lead) free package
* Operating voltage of 3.3 V or 5 V
* Less than one ppm synthesis error in all clocks
* Inex.

Application

Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal in.

Description

The ICS650-01 is a low-cost, low-jitter, high-performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal input to produce up t.

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