ICS650-01B Datasheet PDF - Integrated Circuit Systems System Peripheral Clock Source Specs

ICS650-01B - System Peripheral Clock Source

Datasheet Summary

Description

The ICS650-01B is a low cost, low jitter, high performance clock synthesizer for system peripheral applications.

Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal input to produce up to eight output clocks.

Features

Packaged in 20 pin tiny SSOP (QSOP) ª Operating VDD of 3.3V or 5V.
Less than one ppm synthesis error in all clocks.
Inexpensive 14.31818 MHz crystal or clock input.
Provides Ethernet and Fast Ethernet clocks.
Provides SCSI clocks.
Provides PCI clocks.
Selectable AC97 audio clock.
Selectable interface clock.
OE pin tri-states the outputs for testing.
Selectable frequencies on three clocks.
Duty cyc.

Datasheet Details

Part number	ICS650-01B
Manufacturer	Integrated Circuit Systems
File Size	42.18 KB
Description	System Peripheral Clock Source
Datasheet	ICS650-01B Datasheet
Additional preview pages of the ICS650-01B datasheet.

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Full PDF Text Transcription

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ICS650-01B System Peripheral Clock Source Description The ICS650-01B is a low cost, low jitter, high performance clock synthesizer for system peripheral applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device accepts a parallel resonant 14.31818 MHz crystal input to produce up to eight output clocks. The device provides clocks for PCI, SCSI, Fast Ethernet, Ethernet, and AC97. The user can select from multiple interface frequencies, and also one of three AC97 audio frequencies. The OE pin puts all outputs into a high impedance state for board level testing. All frequencies are generated with less than one ppm error, meeting the demands of SCSI and Ethernet clocking. The ICS650 can be mask customized to produce any frequencies from 1 to 150 MHz.

Published: Apr 27, 2006 |