Description
This improved full adder performs the addition of two 4-bit binary numbers.
The sum (Σ) output are provided for each bit and the resultant carry (C4) is obtained from the fourth bit.
Features
- full internal look ahead across all four bit generating the carry term in ten nanoseconds typically. This provides the system designer with partial look-ahead performance at the economy and reduced package count of a ripple-carry implementation. Features.
- High Speed Operation: tpd (Ai or Bi to Zi) = 16 ns typ (CL = 50 pF).
- High Output Current: Fanout of 10 LSTTL Loads.
- Wide Operating Voltage: VCC = 2 to 6 V.
- Low Input Current: 1 µA max.
- Low Quiesce.