Datasheet Details
| Part number | 8P34S1208 |
|---|---|
| Manufacturer | Renesas |
| File Size | 1.26 MB |
| Description | 2:8 LVDS 1.8V / 2.5V Fanout Buffer |
| Datasheet |
 8P34S1208 Datasheet
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General Description
The 8P34S1208 is a high-performance differential LVDS fanout buffer.
The device is designed for the fanout of 1PPS signals or high-frequency, very low additive phase-noise clock and data signals.
Key Features
- Eight low skew, low additive jitter LVDS output pairs.
- Two selectable, differential clock input pairs.
- Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML.
- Maximum input clock frequency: 1.5GHz.
- LVCMOS/LVTTL interface levels for the control input select pin.
- Output skew: 20ps (typical).
- Propagation delay: 400ps (maximum).
- Low propagation delay variation across temperature for 1PPS appl.