* 256K x 36 Synchronous Bank-Switchable Dual-ported SRAM Architecture
  – 64 independent 4K x 36 banks
  – 9 megabits of memory on chip <.

having unidirectional or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, .

on page 19 for details. ©2019 Integrated Device Technology, Inc. MUX 4Kx36 MEMORY ARRAY (BANK 0) MUX MUX 4Kx36 MEMORY ARRAY (BANK 1) MUX TDI TDO MUX 4Kx36 MEMORY ARRAY (BANK 63) MUX JTAG TMS TCK TRST 1 CONTROL LOGIC I/O CONTROL PL/FTR OPTR CLK.

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