RF2460 Datasheet | RF Micro Devices

Description The RF2460 is a receiver front-end designed for the receive section of PCS CDMA and W-CDMA applications. It is designed to amplify and downconvert RF signals while providing 29d B of stepped gain control range and features digital control of LNA gain, mixer gain, and power down mode. A further feature of the chip is adjustable IIP3 of the LNA and mixer using an off-chip current setting resistor. Noise Figure, IP3, and other specs are designed to be patible with the IS-98B for CDMA PCS munications. The IC is manufactured on a Si Ge HBT process and packaged in a 20-pin leadless chip carrier with an exposed die flag. 1.00 0.90 0.60 0.24 typ 4.00 sq. 0.65 0.30 4 PLCS 3 0.20 2.10 sq. 12° MAX 0.05 Dimensions in mm. 0.75 0.50 0.50 Note orientation of package. 0.23 0.13 4 PLCS NOTES: 1 Shaded lead is Pin 1. 2 Pin 1 identifier must exist on top surface of package by identification mark or feature on the package body. Exact shape and size is optional. FRONT-ENDS Dimension applies to plated terminal: to be measured between 0.02 mm and 0.25 mm from terminal end. 4 Package Warpage: 0.05 mm max. 5 Die Thickness Allowable: 0.305 mm max. Optimum Technology Matching® Applied Si BJT Si Bi-CMOS Package Style: LCC, 20-Pin, 4x4 üSi Ge HBT LNA IN NC NC Ga As HBT Ga As MESFET Si CMOS LNA GAIN MIX GAIN Features - plete Receiver Front-End - Stepped LNA/Mixer Gain Control - Adjustable LNA/Mixer Bias Current - 20 - ENABLE VCC1 VCC2 LO IN NC 1 2 3 4 5 - 15 14 13 12 11 6 NC 7 IF+ 8 NC 9 IF10 NC - LNA OUT ISET1 ISET2 MIX IN LNA2 E - 24d B Gain and 2.2d B Noise Figure at Maximum Cascade Gain Ordering...