HYS64T256022EDL-3.7-B modules equivalent, 200-pin dual die small-outline-ddr2-sdram modules.
* Programmable self refresh rate via EMRS2 setting
* Programmable partial array refresh via EMRS2 settings
* Average Refresh Period 7.8 µs at a TCASE lower th.
The memory array is designed with stacked 1 Gbit DoubleData-Rate-Two (DDR2) Synchronous DRAMs. Decoupling capacitors are mounted on the PCB. The DIMMs feature serial presence detect based on a serial E2PROM device using the 2-pin I2C protocol. The fi.
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