HYB25DC512160B Datasheet, Qimonda

This chapter lists all main features of the product family HYB25DC512[80/16]0B[E/F] and the ordering information. Double data rate architecture: two data transfers per .

The 512-Mbit Double-Data-Rate SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits. It is internally configured as a quad-bank DRAM. The 512-Mbit Double-Data-Rate SDRAM uses a double-data-rate architecture to achieve .

HYB25DC512160BE

HYB25DC512160BF

HYB25DC512160C

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HYB25DC512800B

HYB25DC512800BE

HYB25DC512800BF

HYB25DC512800C

HYB25DC512800CE

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HYB25DC128160C

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