PZ5128
Description
The PZ5128 CPLD (plex Programmable Logic Device) is the third in a family of Fast Zero Power (FZP™) CPLDs from Philips Semiconductors.
Key Features
- Industry’s first TotalCMOS™ PLD - both CMOS design and process technologies
- Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed
- IEEE 1149.1-pliant, JTAG Testing Capability
- 5 Volt, In-System Programmable (ISP) using the JTAG interface
- On-chip supervoltage generation - ISP mands include: Enable, Erase, Program, Verify - Supported by multiple ISP programming platforms
- High speed pin-to-pin delays of 7.5ns
- Ultra-low static power of less than 100µA
- Dynamic power that is 70% lower at 50MHz than peting devices
- 100% routable with 100% utilization while all pins and all macrocells are fixed
- Deterministic timing model that is extremely simple to use
