PZ5128 Description
The PZ5128 CPLD (plex Programmable Logic Device) is the third in a family of Fast Zero Power (FZP™) CPLDs from Philips Semiconductors. These devices bine high speed and zero power in a 128 macrocell CPLD. With the FZP™ design technique, the PZ5128 offers true pin-to-pin speeds of 7.5ns, while simultaneously delivering power that is less than 100µA at standby without the need for ‘turbo bits’ or other power down...
PZ5128 Key Features
- Industry’s first TotalCMOS™ PLD
- both CMOS design and
- Fast Zero Power (FZP™) design technique provides ultra-low
- IEEE 1149.1-pliant, JTAG Testing Capability
- 4 pin JTAG interface (TCK, TMS, TDI, TDO)
- IEEE 1149.1 TAP Controller
- JTAG mands include: Bypass, Sample/Preload, Extest
- 5 Volt, In-System Programmable (ISP) using the JTAG interface
- On-chip supervoltage generation
- ISP mands include: Enable, Erase, Program, Verify