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74F193 - Up/down binary counter

Description

The 74F193 is a 4-bit synchronous up/down counter in the binary mode.

Separate up/down clocks, CPU and CPD respectively, simplify operation.

The outputs change state synchronously with the Low-to-High transition of either clock input.

Features

  • Synchronous reversible 4-bit counting.
  • Asynchronous parallel load capability.
  • Asynchronous reset (clear).
  • Cascadable without external logic.

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Full PDF Text Transcription

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INTEGRATED CIRCUITS 74F193 Up/down binary counter with separate up/down clocks Product specification IC15 Data Handbook 1995 Jul 17 Philips Semiconductors Philips Semiconductors Product specification Up/down binary counter with separate up/down clocks 74F193 FEATURES • Synchronous reversible 4-bit counting • Asynchronous parallel load capability • Asynchronous reset (clear) • Cascadable without external logic DESCRIPTION The 74F193 is a 4-bit synchronous up/down counter in the binary mode. Separate up/down clocks, CPU and CPD respectively, simplify operation. The outputs change state synchronously with the Low-to-High transition of either clock input. If the CPU clock is pulsed while CPD is held High, the device will count up.
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