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PLL

PL671-02 Datasheet Preview

PL671-02 Datasheet

Spread Spectrum Clock Generator

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PicoEMITM Spread Spectrum Clock Generator
FEATURES
Advanced programmable PLL with Spread Spectrum
Reference Clock input
o 1MHz to 200MHz
Output Frequency
o <200MHz
Two programmable I/O pins
o PDB for Power Down function
o CSEL for Configuration Select
o CLK1/CLK2 additional clock outputs
Programmable Output Drive
Low Cycle to Cycle jitter
Single 2.5V or 3.3V ± 10% power supply
Available in 6-pin SOT23 or Thin SOT (TSOT)
GREEN/RoHS compliant packaging.
PIN CONFIGURATION
Note: ^ Denotes 60kPull-up resistor
DESCRIPTION
The PL671-02 is an advanced Spread Spectrum clock generator (SSCG), and a member of PhaseLink’s
PicoPLLProgrammable Clock family.
The PL671-02 offers up to three 200MHz outputs, and allows for programming the modulation type (Center or
Down Spread) as well as 16 modulation magnitudes (±0.125% to ±2.0% or -0.25% to -4.0%). In addition, the
CSEL pin can be used to toggle the device between 2 pre-programmed configurations. The option of being able
to turn ‘ON/OFF’ the Spread Spectrum modulation allows for completing a design with PL671-02 and having the
assurance of turning ‘ON’ the EMI modulation, if EMI becomes an issue. The PL671-02’s frequency modulation
greatly reduces the fundamental and harmonic frequencies’ peak magnitude, therefore reducing the system level
Electro Magnetic Interference (EMI), by as much as 20dB
BLOCK DIAGRAM
Modulation Magnitude*
PDB
CLK[0:2]
CSEL
* Optional Pre-defined
Modulation Magnitude Control
Programmable Function
R-Counter
9-bits
M-Counter
11-bits
÷8 Phase
Detector
÷8
Charge
Pump
FVCO = FREF * (M/R)
P-Counter
6-bits
Odd/Even
FOUT = FVCO / P
/1, /2
/1, /2, /4
Loop
Filter
SST
Modulation
VCO
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/1/2008 Page 1




PLL

PL671-02 Datasheet Preview

PL671-02 Datasheet

Spread Spectrum Clock Generator

No Preview Available !

www.DataSheet4U.com
PicoEMITM Spread Spectrum Clock Generator
KEY PROGRAMMING PARAMETERS
CLK[ 0:2 ]
Output Frequency
SST Modulation Magnitude
(Spread Percentage)
Programmable
Input/Output
FOUT = FREF * M / (R * P)
where M =11 bit
R = 9 bit
P = 6 bit
CLK0= FREF, FREF/2 or FVCO/P*
CLK1= FREF, FREF/2 or FVCO/P*
CLK2= FREF, CLK0, CLK0/2 or CLK0/4
* ‘P’ is a 6-bit Odd/Even divider.
16 programmable modulation Programmable I/O’s
magnitudes to choose from: include:
Center Spread: ±0.125% PDB – input
to ±2.0% in ±0.125%
steps
CSEL Configuration
Selection - input
Down Spread: -0.25% to - CLK[0:2] - output
4.0% in 0.25% steps
SST On/Off Control.
Output Drive
Strength
Three optional
drive strengths
to choose from:
Low: 4mA
Std: 8mA
(default)
High: 16mA
PACKAGE PIN ASSIGNMENT
Name
(T)SOT23-6L
Pin #
Type
FIN 3 I
PDB, CLK1
1
B
CSEL, CLK2
GND
VDD
CLK0
5
2
4
6
I
P
P
O
Description
Reference input pin (27MHz)
This pin can be programmed as PDB (input) or CLK1 (output).
Power Down (PDB) input. This pin has an internal 60Kpull up
resistor and turns off the oscillator and the output when pulled to
logic “0”.
PDB Logic
Osc PLL
Output
0 Off Off Hi Z (Default)
1 Normal Operation (Default)
Clock1 (CLK1) output. This optional clock can be set to FREF,
FREF/2 or FOUT (Programmable PLL output).
This pin can be programmed as CSEL (input) or CLK2 (output).
CSEL input. Selector pin used to toggle between two pre-
programmed configurations.
CLK2 output. This optional clock can be set to FREF, CLK0, CLK0/2
or CLK0/4.
GND connection
VDD connection
Programmable Clock Output
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 8/1/2008 Page 2


Part Number PL671-02
Description Spread Spectrum Clock Generator
Maker PLL
PDF Download

PL671-02 Datasheet PDF






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