Description
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The NB7L585R is a differential 1:6 RSECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin.The INx/INx inputs incorporate internal 50 W termination resistors and will accept LVPECL, CML, or LVDS logic levels.The NB7L585R produces six identical output copies of Clock or Data operating up to 7 GHz or 10 Gb/s, respectively.As such, NB7L585R is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Dat
Features
- Q0 Q1 0 Q1 Q2
IN1 VT1 IN1
Q2 Q3 50 W 50 W 1 Q3 Q4
VREFAC1 VCC GND Q4 Q5
Q5
Figure 1. Simplified Block Diagram.