File Size : 1.31MB ·
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• On−chip 12−bit Column ADCs
• 10−bit Mode with Increased Frame Rate of
100 fps (24−lane) at Full Resolution
• Companding and 10−Bit Mode at 60 fps
(12−lane) and 30 fps (6−lane)
• Data Interface: 24−lane HiSPi (Scalable
Low−Voltage Signaling)
• Configurable Number of HiSPi Lanes:
24, 18, 12 or 6 Lan.
