Description
The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution
chip featuring a 2:1 Clock/Data input multiplexer with an input select pin.The INx/INx inputs incorporate internal 50 W termination resistors and will accept LVPECL, CML, or LVDS logic levels.The NB7L585 produces six identical output copies of Clock or Data operating up to 5 GHz or 8 Gb/s, respectively.As such, NB7L585 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications.The NB7L585
Features
- Maximum Input Data Rate > 8 Gb/s.
- Data Dependent Jitter < 15 ps.
- Maximum Input Clock Frequency > 5 GHz.
- Random Clock Jitter < 0.8 ps RMS.
- Low Skew 1:6 LVPECL Outputs, 20 ps max.
- 2:1 Multi.
- Level Mux Inputs.
- 175 ps Typical Propagation Delay.
- 55 ps Typical Rise and Fall Times.
- Differential LVPECL Outputs, 800 mV peak.
- to.
- peak, typical.
- Operating Range: VCC = 2.375 V to 3.6 V with GND =.
NB7L585_ONSemiconductor.pdf
