NB7L585 distribution equivalent, differential 1:6 lvpecl clock/data distribution.
* Maximum Input Data Rate > 8 Gb/s
* Data Dependent Jitter < 15 ps
* Maximum Input Clock Frequency > 5 GHz
* Random Clock Jitter < 0.8 ps RMS
* Low Sk.
The NB7L585 is powered with either 2.5 V or 3.3 V supply and is offered in a low profile 5mm x 5mm 32−pin QFN package.
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The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution
chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INx inputs incorporate internal 50 W termination resistors and will accept LVPECL, CML, or LVDS logic.
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