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  ON Semiconductor Electronic Components Datasheet  

NB6VQ572M Datasheet

Multi-Level Inputs w/ Internal Termination

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NB6VQ572M
1.8V / 2.5V Differential 4:1
Mux w/Input Equalizer to
1:2 CML Clock/Data Fanout /
Translator
MultiLevel Inputs w/ Internal Termination
Description
The NB6VQ572M is a high performance differential 4:1 Clock /
Data input multiplexer and a 1:2 CML Clock / Data fanout buffer that
operates up to 5 GHz / 6.5 Gbps respectively with a 1.8 V or 2.5 V
power supply.
Each INx / INx input pair incorporates a fixed Equalizer Receiver,
which when placed in series with a Clock / Data path, will enhance the
degraded signal transmitted across an FR4 backplane or cable
interconnect. For applications that do not require Equalization,
consider the NB7V572M, which is pincompatible to the
NB6VQ572M.
The differential Clock / Data inputs have internal 50 W termination
resistors and will accept differential LVPECL, CML, or LVDS logic
levels. The NB6VQ572M incorporates a pair of Select pins that will
choose one of four differential inputs and will produce two identical
CML output copies of Clock or Data.
As such, the NB6VQ572M is ideal for SONET, GigE, Fiber
Channel, Backplane and other Clock/Data distribution applications.
The two differential CML outputs will swing 400 mV when externally
loaded and terminated with a 50 W resistor to VCC and are optimized
for low skew and minimal jitter.
The NB6VQ572M is offered in a low profile 5x5 mm 32pin QFN
www.DatPaSbheFert4eUe.cpomackage. Application notes, models, and support
documentation are available at www.onsemi.com. The NB6VQ572M
is a member of the ECLinPS MAXfamily of high performance
clock products.
http://onsemi.com
MARKING
DIAGRAM
1 32
QFN32
MN SUFFIX
CASE 488AM
1
NB6V
Q572M
AWLYYWWG
G
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
this data sheet.
Features
Input Data Rate > 6.5 Gb/s Typical
Data Dependent Jitter < 10 ps
Maximum Input Clock Frequency > 5 GHz Typical
Random Clock Jitter < 0.8 ps RMS
Low Skew 1:2 CML Outputs, < 15 ps max
4:1 MultiLevel Mux Inputs, accepts LVPECL, CML,
LVDS
175 ps Typical Propagation Delay
45 ps Typical Rise and Fall Times
Differential CML Outputs, 400 mV PeaktoPeak,
Typical
Operating Range: VCC = 1.71 V to 2.625 V with GND
=0V
Internal 50 W Input Termination Resistors
VREFAC Reference Output
QFN32 Package, 5mm x 5mm, PbFree
40°C to +85°C Ambient Operating Temperature
These are PbFree Devices
© Semiconductor Components Industries, LLC, 2009
April, 2009 Rev. 0
1
Publication Order Number:
NB6VQ572M/D


  ON Semiconductor Electronic Components Datasheet  

NB6VQ572M Datasheet

Multi-Level Inputs w/ Internal Termination

No Preview Available !

NB6VQ572M
Multilevel Inputs
LVPECL, LVDS, CML
IN0
VT0
IN0
50 W
50 W
VREFAC0
IN1
VT1
50 W
50 W
IN1
VREFAC1
IN2
VT2
50 W
50 W
IN2
VREFAC2
IN3
VT3
50 W
50 W
IN3
VREFAC3
EQ0
0
EQ1
EQ2
1
4:1 MUX
2
EQ3
3
SEL0
SEL1
Figure 1. Simplified Block Diagram
CML OUTPUTS
Q0
Q0
Q1
Q1
Exposed
Pad (EP)
32 31 30 29 28 27 26 25
IN0 1
24 GND
VT0 2
23 VCC
VREFAC0 3
IN0 4
NB6VQ572M
22 Q1
21 Q1
www.DataSheeINt41 U.c5om
VT1 6
VREFAC1 7
20 VCC
19 NC
18 SEL1
IN1 8
17 VCC
9 10 11 12 13 14 15 16
Table 1. INPUT SELECT FUNCTION TABLE
SEL1*
SEL0*
Clock / Data Input Selected
00
IN0 Input Selected
01
IN1 Input Selected
10
IN2 Input Selected
11
IN3 Input Selected
*Defaults HIGH when left open.
Figure 2. Pinout: QFN32 (Top View)
http://onsemi.com
2


Part Number NB6VQ572M
Description Multi-Level Inputs w/ Internal Termination
Maker ON Semiconductor
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