NB6L14S buffer/translator equivalent, 2.5v 1:4 anylevel differential input to lvds fanout buffer/translator.
* Maximum Input Clock Frequency > 2.0 GHz
* Maximum Input Data Rate > 2.5 Gb/s
* 1 ps Maximum of RMS Clock Jitter
* Typically 10 ps of Data Dependent Jitt.
The NB6L14S has a wide input common mode range from GND + 50 mV to VCC − 50 mV. Combined with the 50 W internal termina.
Pin Name
I/O
Description
1 Q1
LVDS Output
Non−inverted IN output. Typically loaded with 100 W receiver termination resistor across differential pair.
2 Q1
LVDS Output
Inverted IN output. Typically loaded with 100 W receiver termination resis.
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